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Chips&Media Unveils the ‘Data Compression (Feature Map Compression) IP’ to Resolve NPU Bottlenecks

Chips&Media, Inc. 2026-10-06 Number of views 116

[Press Release] Chips&Media Expands Beyond Traditional Video Codecs to Become a Multimedia IP Leader… 

Unveiling the ‘Data Compression (Feature Map Compression) IP’ to Resolve NPU Bottlenecks

 

  • Accelerating entry into AI edge and server markets with a high-performance, lossless Data Compression HW IP differentiated from competitors' heavy bundled solutions
  • Feature map algorithm and C-model ready… Driving full speed toward hardware implementation completion in Q1 2027

 

[October 6, 2026] – Chips&Media (CEO Sang-Hyun Kim, KOSDAQ: 094360), a global leading video IP (Semiconductor Intellectual Property) provider, announced the official launch of its first non-video application multimedia IP, ‘Data Compression (Feature Map Compression) IP (DC)’, signaling its full-scale business expansion into a comprehensive multimedia IP provider.

 

Recently, as artificial intelligence (AI) inference workloads surge across edge devices and servers, AI computations face critical hardware bottlenecks that restrict overall system performance. In particular, the continuous reading and writing of massive activation values (feature maps) from external memories such as DRAM causes severe memory bottlenecks characterized by the following challenges:


  • Memory Bandwidth Saturation: The external memory bandwidth limit is reached faster than the AI compute engines can process data, impairing the overall data transfer capability of the system.
  • Increased Power Consumption and Reduced Energy Efficiency: Unnecessarily frequent and heavy memory traffic maximizes overall power consumption, posing a critical vulnerability in mobile and embedded environments where thermal management is paramount.
  • Compute Unit Stalls: When data is not supplied in a timely manner from memory, even high-performance NPU cores are forced to stall while waiting for data, resulting in a substantial drop in overall hardware utilization and throughput.

 

Developed to fundamentally resolve these hardware limitations in NPU environments, Chips&Media’s Data Compression IP offers innovative technical competitiveness distinct from competitors' complex general-purpose compression approaches:


  • Lossless Compression Ensuring Perfect AI Accuracy: Enables exact reconstruction without any loss of original data, completely preventing any degradation in AI model inference accuracy. 
  • Overwhelming Bandwidth Savings: Achieves outstanding bandwidth reduction rates—35.2% for FP16, 45.7% for BF16, and 53.5% for INT8—tested across major vision networks (ResNet, MobileNet, YOLO, etc.), thereby maximizing NPU performance headroom. 
  • Optimal System Integration Structure (Inline AXI Bridge): Designed as a lightweight plug-in structure between the existing NPU and AXI bus, eliminating the need for internal SRAM while reusing the AXI clock to minimize hardware area and enhance integration convenience. 
  • High-Speed Processing and Multi-Data Type Support: Supports various data formats including INT8, FP16, and BF16 alongside line-rate processing to flawlessly match high-speed data flows. 

 

Currently, the core feature map algorithm and C-model have been successfully prepared. Furthermore, Chips&Media plans to progressively expand its lineup toward static weight compression and KV cache compression for large language models (LLMs/VLMs) based on customer requirements and workload characteristics. 

 

A Chips&Media representative stated, "Building upon over 20 years of accumulated expertise in hardware IP design and power, area, and performance optimization, we will firmly maintain our absolute leadership in the video codec market while taking a leap as a game changer that opens up the fast-growing AI and high-performance multimedia IP markets." They added, "Starting with this Data Compression IP, our upcoming video-related IP lineup will serve as a core roadmap for Chips&Media's entire multimedia IP group, driving close review and adoption by major global customers and fueling our sustainable growth."

 

 

About Chips&Media Inc.

Chips&Media is a multimedia IP leader offering HW video codec IP, image processing NPU, lossless/lossy frame buffer compression IP & others. Since 2003, Chips&Media has exclusively focused on the HW video codec IP industry. It has powered over 3,000,000,000 units in the market, adopted by more than 150 semiconductor companies. Chips&Media's video codec IP supports all major and legacy formats from 1080p up to 8K 120fps, including HEVC/H.265, AVC/H.264, AV1, AV2, VP9, APV, VVC/H.266, JPEG & others. The recent introduction of our image processing NPU IP is transforming Chips&Media into a premium multimedia IP provider. It is a custom NPU designed to work for imaging application at high-quality and high-resolution in edge devices. For more information, please visit our website at www.chipsnmedia.com